Should I lock PCIe to Gen 3 on Onda A520-VH-W for UE5?
Man, this demo is a total hardware killer; my motherboard just decided to give up on me, which was just great. The PCIe lanes on the Onda A520-VH-W struggled with UE5's Nanite geometry data streams. Due to poor signal integrity, the bus kept flipping between Gen 4 and Gen 3, triggering constant TDR driver crashes. I first tried lowering texture resolution, but the image became a blurry mess—a total mental torture. I eventually went into the BIOS and forced the PCIe protocol to Gen 3 mode and updated to the latest AMD chipset drivers to fix the IRQ distribution. GPU-Z showed the link finally stabilized at 8.0 GT/s, and the crashes vanished. I did notice my NVMe read speeds dropped by about 1GB/s after the lock, but reformatting the partition seemed to help a bit. Board temps stayed around 42℃ - 48℃. I exported all the link error logs from the system event viewer, and fan speeds stayed consistent at 1400-1600RPM.
